REPDELAY=NODELAY, VREFSEL=VBGR, PRSSEL=PRSCH0
Scan Control Register Continued
VREFSEL | Scan Channel Reference Selection 0 (VBGR): Internal 0.83V Bandgap reference 1 (VDDXWATT): Scaled AVDD: AVDD*(the VREF attenuation factor) 2 (VREFPWATT): Scaled singled ended external Vref: ADCn_EXTP*(the VREF attenuation factor) 3 (VREFP): Raw single ended external Vref: ADCn_EXTP 5 (VREFPNWATT): Scaled differential external Vref from : (ADCn_EXTP-ADCn_EXTN)*(the VREF attenuation factor) 6 (VREFPN): Raw differential external Vref from : (ADCn_EXTP-ADCn_EXTN) 7 (VBGRLOW): Internal Bandgap reference at low setting 0.78V |
VREFATTFIX | Enable Fixed Scaling on VREF |
VREFATT | Code for VREF Attenuation Factor When VREFSEL is 1, 2 or 5 |
VINATT | Code for VIN Attenuation Factor |
DVL | Scan DV Level Select |
FIFOOFACT | Scan FIFO Overflow Action |
PRSMODE | Scan PRS Trigger Mode |
PRSSEL | Scan Sequence PRS Trigger Select 0 (PRSCH0): PRS ch 0 triggers scan sequence 1 (PRSCH1): PRS ch 1 triggers scan sequence 2 (PRSCH2): PRS ch 2 triggers scan sequence 3 (PRSCH3): PRS ch 3 triggers scan sequence 4 (PRSCH4): PRS ch 4 triggers scan sequence 5 (PRSCH5): PRS ch 5 triggers scan sequence 6 (PRSCH6): PRS ch 6 triggers scan sequence 7 (PRSCH7): PRS ch 7 triggers scan sequence 8 (PRSCH8): PRS ch 8 triggers scan sequence 9 (PRSCH9): PRS ch 9 triggers scan sequence 10 (PRSCH10): PRS ch 10 triggers scan sequence 11 (PRSCH11): PRS ch 11 triggers scan sequence |
CONVSTARTDELAY | Delay Next Conversion Start If CONVSTARTDELAYEN is Set |
CONVSTARTDELAYEN | Enable Delaying Next Conversion Start |
REPDELAY | REPDELAY Select for SCAN REP Mode 0 (NODELAY): No delay 1 (4CYCLES): 4 conversion clock cycles 2 (8CYCLES): 8 conversion clock cycles 3 (16CYCLES): 16 conversion clock cycles 4 (32CYCLES): 32 conversion clock cycles 5 (64CYCLES): 64 conversion clock cycles 6 (128CYCLES): 128 conversion clock cycles 7 (256CYCLES): 256 conversion clock cycles |